The present invention disclosed herein relates to semiconductor memory devices. More particularly, the present invention relates to a flash memory device capable of adjusting a read voltage.
Semiconductor memory devices are generally classified as volatile or nonvolatile memories with respect to data storage. Volatile memories operate at a high frequency, but have a disadvantage with respect to data retention because they lose data without power. In contrast, nonvolatile memories are useful because they maintain data regardless of whether power is supplied. Nonvolatile semiconductor memories include, for example, read-only memories (ROMs), mask ROMs (MROMs), programmable ROMs (PROMs), erasable and programmable ROMs (EPROMs), and electrically erasable and programmable ROMs (EEPROMs).
MROMs, PROMs and EPROMs are ordinarily regarded as inconvenient by general users with respect to updating contents because of difficulties in erasing and writing data. EEPROMs, however, are increasingly employed as subsidiary storage devices or system-programming tools, which require periodic or continuous updates, because they are able to electrically erase and write data. Flash EEPROMs, in particular, are better than conventional EEPROMs with respect to integration density, and may therefore be advantageously used as high-capacity subsidiary storage units. NAND type flash EEPROMs (hereinafter, referred to as “NAND flash memories”) are typically superior to other types of flash EEPROMs with respect to integration density.
A flash memory device is a kind of integrated circuit capable of storing information and reading out information, if necessary. The flash memory device includes multiple memory cells that are rewritten with data. Each memory cell may store one-bit data or multi-bit data. In the case of storing one-bit data in a unit memory cell, the memory cell is conditioned in one of two possible threshold-voltage distributions, i.e., one of two data states “1” and “0”. By comparison, in the case of storing two-bit data in a unit memory cell, the memory cell is conditioned in one of four possible threshold-voltage distributions. Further, in the case of storing three-bit data in a unit memory cell, the memory cell is conditioned in one of eight threshold-voltage distributions. Recently, studies have been directed to the possibility of storing four-bit data in a unit memory cell.